The entire radio, with the exception of the A-to-D converter,
is implemented in the FPGA!
A tunable antenna preamp (Ameco TPA) is connected directly to the A to D converter: there is no analog front-end.
The audio output is produced with delta-sigma DACs implemented in the FPGA.
Control is by a computer via an RS232 link to the FPGA

·        Xilinx SpartanII-100

·        Tuning range: DC-20 MHz, 0.01 Hz resolution

·        RF directly sampled 12 bits at 40 MHz, 1vp-p

·        Direct conversion to complex baseband

·        >80 dB selectivity

·        25 KHz audio output sample rate

·        10 KHz output bandwidth

·        Stereo Delta-Sigma DAC w/160 MHz chip rate yields 12.7 effective bits at 25 KHz

·        AM stereo, DSB, SSB, CW Demodulation modes

·        200 tap FIR programmable shaping filter

·        Controlled by a laptop via an RS-232 interface

 

 

 

 

LAPTOP software console controls Radio via RS232 link

We demonstrated this radio at the IEEE Field-Programmable Custom Computing Machines (FCCM) conference on April 9, 2003 and at The Military and Aerospace Programmable Logic Device (MAPLD)  Conference, Sept 8-11 2003.

This design was developed as a capabilities demonstration and as a design example for a book on DSP with FPGAs that has not been completed.