logob3.gif (7247 bytes)

Site Search Feedback Site Map Contact Us Copyright Info

 
Andraka Consulting Group, Inc.  "the high performance FPGA design specialist"  

Links

 
     
Home      

 

 

FPGA FAQ

Public repository for the frequently asked questions (FAQs) for designers of systems using FPGAs. The contributors to this site are typically also participants in the comp.arch.fpga news group.

 

Vendor pages:

Actel
Atmel
Altera
Lattice Semiconductor
Quicklogic
Xilinx

Online FPGA Sources:

Avnet Marshall price and availability

NuHorizons

 

CORES

opencores.org A growing library of freeware and shareware cores for common functions.. 

Synthesizable HC11 Core 

RISC5x PIC compatible core 

 

Neat tricks, techniques:

DSP Guru's DSP tricks
A collection of DSP shortcuts not often found in textbooks. Some hardware, mostly software short cuts to reduce the computional load in DSP systems.  This one is very readable.

MIT's AI lab collection of computer hacks (html reprint)
This is a somewhat sketchy collection of algorithmic shortcuts for a wide variety of applications, some fun, some serious and some just plain cryptic.  Not for the casual read, but it might be worth mining for that tough to crack nut.  
Original 1972 HAKMEM document in PDF form

The DSPStore A one stop shop for DSPalgorithms, books, devices, software, boards, tools, utilities, etc

 

Interesting Articles about DSP in FPGAs by other authors

Soft Radios and Modems on FPGAs Les Mintzer, Communication System Design, February 2000

Hardware Implementations of Digital Multirate Filters  Tony San, Communication System Design, April 2000

Moving Data across Asynchronous Clock Boundaries Peter Alfke, Integrated System Design, 2000

 

Other websites

Comp.DSP FAQ

Bore's Introduction to DSP

Berkeley Design Technology, Inc. (BDTI)

citeseer.nj.nec.com is quite a good resource for DSP papers. It's mainly a citation database, but it has downloadable copies of a lot of the papers too.

FPGAs4fun a neat introductory site to fpgas with lots of fun examples

 

Algorithms and Number Theory

FFT demystified

Square Root Theory
A discussion of conventional restoring and non-restoring iterative square root algorithms

A different square root algorithm
Looks interesting, although I haven't had the time to evaluate it yet

 

Randy Yates'  fixed point arithmetic pages
A pretty nice introduction to fixed point arithmetic Defines signed and unsigned fixed-point binary number representations and develops basic rules and guidelines for the manipulation of these number representations using the common arithmetic and logical operations found in fixed-point DSPs and hardware components.

Practical Considerations in Fixed-Point FIR Filter Implementations discusses The effects of fixed point arithmetic on FIR filter performance

Randy's DSP Home page

Linear Feedback Shift Registers

Maximal Length LFSR Feedback Terms A catalog of Maximal length sequences to 39 bits for LFSRs

Xilinx application note XAPP052 - Efficient Shift Registers, LFSR Counters, and Long Pseudo-Random Sequence Generators 
 and for Virtex,  XAPP210 "Linear Feedback Shift Registers in Virtex Devices", v 1.2 (1/01) 

CRC code generator generates VHDL and Verilog for arbitrary CRC polynomials and data bus widths.

A Painless Guide To CRC Error Detection A

 

Metastability

Any time you have two asynchronous clocks in a system, you have a probability of suffering a metastable event.  Learning to deal with it correctly makes the difference between a system that will caus etrouble or on that works.  Phillips Semiconductor has a decent primer on metastability in the form of an application note.

 

Digital Phase Lock Loops

Actel application note s04_18 shows some of the basics for a DPLL implemented in FPGAs

 

VHDL tips, tutorials, etc

Aldec

Green Mountain

VHDL Library of Arithmetic Units

Function for generating bit_vector from boolean expression
A very nice VHDL function that parses and converts a boolean expression to a bit vector that can be used for INIT values on XIlinx LUT primitives (under locking logic to a single..), also an itoa function.

Stefan Doll's VHDL Verification Course
An On-line course covering Basics of VHDL modeling and verifcation

 

 
Send mail to info@andraka.com with questions or comments about this web site.
Images and text Copyright © 1998-2007 Andraka Consulting Group, Inc.
Images and text may not be reproduced without express written permission from Andraka Consulting Group, Inc.  
This site url is http://www.andraka.com
Last modified: March 16, 2007